LC-3 Input/Output (I/O)
Interacting with devices outside of the ISA
Key Concepts |
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Terms
Term | Meaning |
---|---|
Asynchronous | A data exchange between sender and receiver when they do not share an internal clock. - See Notes for more on how to better this definition and Synchronous definition. |
Data Register | A storage location that a central processing unit (CPU) and Input/Output (I/O) Device use to exchange data. Data registers are used in Polling and Asynchronous data exchange. |
Driver | A type of software that negotiates data transfer between an I/O device and a CPU. |
Input/Output Device | A hardware component installed on a motherboard that facilitates passing of data between that device and the CPU. Inputs and outputs are from the perspective of the CPU. A keyboard is a CPU input device and a monitor is a CPU output device. |
Interrupt | Controlling data exchange by requiring the I/O device to notify the CPU there is new data, then waiting until the CPU to request the new data when it is ready to process it. |
Polling | Controlling data exchange by checking for new data in a repetitious time interval. |
Priorities | A system the CPU uses to decide which I/O data to process next if there are multiple devices with data ready to process. |
Status Register | A storage location that CPU and I/O Device use to share the I/O Device's status. Status registers are used in Polling and Asynchronous data exchange. |
Synchronous | A data exchange between sender and receiver when they share an internal clock. - See Notes for more on how to better this definition and Asynchronous definition. |
Introduction
LC-3 has 1 input and 1 out device. Both devices are built-in, so no additional drivers are needed to access either one
Both devices are Synchronous and Polled
Keyboard Input
The built-in keyboard input device uses 2 memory-mapped addresses within the LC-3's memory space. Both addresses are near the end of memory space
Register Mnemonic | Address | Purpose |
---|---|---|
KBSR | 0xFE00 | Keyboard Status Register |
KBDR | 0xFE02 | Keyboard Data Register |
True/False These Registers are shared by all programs running in Simulate | |
Keyboard Status Register
The KBSR is polled to determine if there is a new character for the program to read. Once the user presses a key on the keyboard, the KBSR is set to a non-zero value
In LC-3 Simulate, the user must print the console window to the foreground before pressing a key
KBSR[15] is set to 1
KBSR[14-0] are not used
Therefore, to test the KBSR for a keypress is to
- Read the KBSR into a register
- Check the Condition Code (CC) register
- If CC is negative, a key was struck
- If CC is positive or zero, loop back and read the KBSR again
Quick Question: Choose One Why do you think only KBSR[15] is used rather that other bits? | |
Keyboard Data Register
When a key is pressed on the keyboard, the ASCII value for the key loaded into the KBDR. Next, the KBSR[15] is set to 1
Reading the value is simply loading the data from the KBDR address
Example Code
.ORIG x3000
; Get input character
START LDI R1, KBSR ; Check the KBSR
BRzp START ; Loop back if no new key yet
LDI R0, KBDR ; key pressed, load ascii value
HALT ;End of Program
;Data Declarations-------------
KBSR .FILL xFE00 ;Keyboard Status Register
KBDR .FILL xFE02 ;Keyboard Data Register
.END
- Lines 4 and 5 are a simple loop, waiting for KBSR to become negative
- Once KBSR[15] is set to 1, and the entire KBSR is negative, the code falls through to line 6, where the KBDR is read into R0
- Lines 11 and 12 are data declaration to the Keyboard Registers
Display Output
The display works very similar to the keyboard, but, being an output device, the polling loop is checking for something different
Register Mnemonic | Address | Purpose |
---|---|---|
DSR | 0xFE04 | Display Status Register |
DDR | 0xFE06 | Display Data Register |
With a polled output device, the program must check with the device to see it it is ready for data. Once ready, the program provides the data and the display is updated
Display Status Register
Like the KBSR, the DSR[15] is used to know when the device is ready. When the display device is ready to display a new character, it sets DSR[15] to 1
DSR[14-0] are not used
To test the DSR is ready for a new character
- Read the DSR into a register
- Check the Condition Code (CC) register
- If CC is negative, it is ready
- If CC is positive or zero, loop back and read the DSR again
Display Data Register
When the display device is ready it sets the DSR[15] to 1. The program can now store the ascii value for the desired character in the DDR.
The display device will detect the change in DDR and write the character out to the console.
Example Code
.ORIG x3000
LD R0, A ; Load ascii value of 'A'
; Write characher to screen
WAIT LDI R1, DSR ; Check DSR for ready
BRzp WAIT ; loop until DSR is empty/ready
STI R0, DDR ; Update DDR to display character
HALT ;End of Program
;Data Declarations-------------
A .FILL x41 ; ASCCI 'A'
DSR .FILL xFE04 ;Display Status Register
DDR .FILL xFE06 ;Display Data Register
.END
- Lines 4 and 5 are a simple loop, waiting for DSR to become negative
- Once DSR[15] is set to 1, and the entire DSR is negative, the code falls through to line 7, where the ascii value in R0 is written to DDR
- Lines 13 and 14 are data declaration to the Display Registers
Why check the Status Register?
Checking the KBSR or DSR are necessary for the program to maintain the synchronous interface agreement the LC-3 defines for Keyboard and Display IO operations.
If a program did not check the KBSR before reading data from the KBDR, it may read either
- Zeros because no key had been pressed yet
- The value of a previous keyboard interaction because the user has not press a new key yet
Skipping the DSR check may result in corrupting the last data sent to the display, that is still being processed by the display device yet.
True/False I vow to always (in this class anyway) check the Keyboard and Display status register before accessing their data register | |
Conclusion
LC-3 has a display output device and a keyboard input device. These I/O devices must be polled by user program to ensure they are ready to send/receive data with the user program.
Each device has a well-known pair of Status and Data registers, defined by memory addresses. The user program and the devices reference these addresses to share status and data.